“A homogeneous architecture can be scaled up much more easily”

ADT: Could you explain the concept of a disruptive homogeneous processing architecture for ADAS/AD SoC solutions? 

In contrast to all today’s SoCs targeting ADAS/AD solutions, which are more or less heterogeneous collections of processors each specialized for a certain subset of the needed algorithms (e.g., NPU, GPU, DSP, ISP, codecs), we - in our disruptive approach - are using a large number of identical processing cores, each of them capable to act as NPU, GPU, DSP, ISP or codec, purely defined by software. The needed processing performance for each of these algorithmic classes can then be achieved by assigning a certain number of cores to each of them – as required by the targeted algorithm stack. This assignment can be changed by software at any time, allowing flexible boundaries between all of these processing variants – even at run-time.

How does this architecture enable cost-efficient and scalable solutions? 

The flexible allocation of the processing cores described before leads to a very high silicon utilization over various use cases, very high efficiency, and thus much smaller die sizes (costs) as well as much lower power needs – also important in today’s environments. In addition, such a homogeneous architecture can be scaled up much more easily by just adding more cores – in comparison to the heterogeneous architectures used today, where each specialized processing core (NPU, GPU, DSP, ISP, codec) needs to be scaled individually by taking worst case scenarios into consideration, thus usually leading in total to “over-designed” solutions. Moreover, with the much lower number of different units on the SoC, also the SoC design itself is much simplified, leading to significantly reduced development cost and faster time-to-market.

What impact does this have on the development of software-defined vehicles? 

In a software-defined vehicle (SDV), hardware will be unified as much as possible, and SW components can be moved from one ECU to the other without any problems. Our homogeneous architecture scales very well, thus can become the SoC processing part of any ECU, including full scalability to all-central processing. Each SoC then can be adapted to its specific tasks just by making use of our software-definable architecture. Software programmed for SoCs using our architecture can be easily moved to any other SoC based on our architecture, because the underlying cores are exactly the same. We even have ensured software portability between the different core architecture versions from the first up to our current fourth generation, means that any software written for an older architecture version can be run on any of the subsequent architecture versions without any changes. In addition, we provide a unified tool flow (AI and non-AI), which can be used to develop software for all videantis-based SoCs – in contrast to the different tool flows needed when programming today’s SoCs with their heterogeneous architectures. This way, our homogeneous architecture approach can also significantly reduce development cost, time-to-market, and maintenance efforts for all software functionality of the SDV.